The Future Of Code Storage

Frederick Chen, Sr. Technology Manager - Advanced Technology Development, Winbond

Code storage plays a crucial role in modern electronics, enabling the execution of bootloaders, firmware, and other essential software. While the storage industry has seen significant advances, code storage has unique requirements that set it apart from general-purpose data storage. This article examines the current state of code storage, its challenges, and potential future developments.

The Current Landscape Of Code Storage

Most code storage applications typically require capacities under 1 Gb. Bootloaders and firmware, for instance, often require at most 128 Mb. In contrast, the overwhelming majority of data storage today relies on 3D NAND Flash, which stacks memory cells in up to over 200 200 layers, each cell storing multiple bits using TLC (3-bit) or QLC (4-bit) technology. However, despite its efficiency for near Tb-scale storage, 3D NAND is not well suited for small-scale code storage, as a single layer already exceeds 1 GB capacity.

For neither sub-1 GB code storage, NOR Flash remains the most common solution due to its low cost, high reliability, fast read speeds, and execute-in-place (XiP) capability. These advantages make it ideal for embedded systems, where fast and direct execution is necessary. However, NOR Flash has its limitations. When approaching 1 GB or higher capacities, it becomes expensive due to larger chip area requirements. Its scaling is constrained by channel hot electron injection, which limits gate lengths to above 100 nm.

For applications requiring more than 1 GB but still negligible compared to general data storage, 2D NAND Flash is often used as a cost-effective alternative. 2D NAND benefits from its smaller cell size because it relies on Fowler-Nordheim tunneling rather than hot electron injection. However, NAND Flash has a fundamental drawback for code storag it does not support XiP, meaning code must be copied into DRAM before execution.

As storage needs increase further, beyond 128 GB, 3D NAND becomes the dominant solution, offering the required density and scalability. However, the lack of XiP remains a fundamental limitation.

Potential Disruptor: Faster, LowVoltage Nonvolatile Memories New types of nonvolatile memory, including magnetic RAM (MRAM), resistive RAM (ReRAM), phase change memory (PCM), and ferroelectric RAM (FeRAM), offer potential advantages over Flash memory, such as higher speed and lower operating voltage. These technologies could enhance energy efficiency and performance in embedded systems.

However, Their Adoption Has Been Limited By Several Challenges:

• Reliability concerns, including retention, endurance, and read/write disturbances.

• Higher operating currents, which necessitate larger transistors, increasing chip size.

• Manufacturing costs, as these memories require specialized materials and processes, making large-scale production more expensive than Flash memory.

While work continues to improve these technologies, their widespread adoption will depend on overcoming these issues.

Potential Disruptor:

Cross point Architectures A second potential disruptor is cross-point memory, where a memory element is located at the intersection of a bit line and a perpendicular word line. These architectures are attractive because they are transistor-free, allowing higher density than traditional memory. A device known as a selector is included in series with the memory element for two functions. First, when the cell is not selected, it blocks current from flowing through the memory element, as well as prevents too much voltage from being placed on the memory element. Second, the selector regulates how much current passes through the memory element when it is selected, allowing targeted operation specs to be met. Some implementations, such as selector-only memory (SOM), combine the memory and selector function in a single device.

Cross-Point Memory Has Several Advantages, Such As:

• A transistor-free architecture completely avoids short-channel effects.

• Cross-point access inherently allows XiP

• Peripheral circuitry can be placed underneath the memory array, reducing chip area.

• The cross-point memory can be vertically stacked into 3D structures.

However, despite these advantages, cross-point architectures face significant production and integration challenges. The need for high-performance selectors, variability issues, and the cost of new fabrication processes currently limit their adoption.

Conclusion

For the near future, NOR Flash will remain the dominant choice for code storage under 1 Gb, while NAND Flash (2D and 3D) will continue to be the preferred option for larger capacities. The fundamental limitations of flash memories create opportunities for alternative memory technologies, but none have yet proven to be a commercially viable replacement, especially for Tb-scale capacities typical of 3D NAND.

If future advancements in MRAM, ReRAM, PCM, FeRAM, or SOM lead to improved reliability, lower power consumption, and cost-effective manufacturing, these technologies could challenge flash memory. However, until these barriers are overcome, NOR Flash and NAND Flash will continue to be the backbone of code storage solutions.